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Memory Glossary

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A~K

Bit - The smallest unit of binary data, assumes the value of either 1 or 0.

Byte - A byte is equal to 8 bits. "Byte" is often used in conjunction with a scientific prefix indicating the number of bytes. For example, 1 KB (one kilobyte) = 1,024 bytes, 1 MB (one megabyte) = 1,024 KB, and 1 GB (one gigabyte) = 1,024 MB.

CAS - Column Address Strobe: A signal sent by the processor to the DRAM indicating a column address. DRAM stores data in a matrix of columns and rows, data is retrieved from DRAM through CAS and RAS (Row Access Strobe) signals – just like coordinates on a map.

CL/CAS Latency – The amount of time it takes between a CAS signal assertion and the initial transfer of the data stream. CAS Latency is measured in clock cycles. For example, a CAS Latency of 2 or CL2 means data is available 2 clock cycles after CAS signal assertion.

DDR - Double Data Rate: DDR SDRAM sends and receives data twice as often as common SDRAM. This is achieved by transferring data on both the rising edge and the falling edge of a clock cycle.

DDR2 - Second generation DDR memory provides greater bandwidth and other features such as On-Chip Termination (OCT). There are 4 bits of data moved from the memory array to the I/O buffers (per data line) each core cycle - this can be described as 4-bit prefetch, as opposed to the single fetch in SDRAM and 2-bit prefetch with DDR SDRAM.

DDR3 - Third generation DDR memory leaps greatly forward in terms of data transfer rate and power management. DDR3 provides even higher bandwidth than DDR2 memory due to the 8-bit prefetch buffer (4-bit prefetch of DDR2, and 2-bit of DDR). The advanced fabrication technology allows lower operating currents and voltages (1.5V, compared to 1.8V in DDR2) and thus enhances thermal performance.

DIMM - Dual In-Line Memory Module: Circuit board where RAM memory chips are mounted. A DIMM is capable of transferring 64 bits of data in a cycle.

DRAM - Dynamic Random Access Memory: The memory cells of DRAM require constant refreshing as they utilize transistors and capacitors. Capacitors lose the values they store as time elapses without refreshing.

Dual-Channel – In terms of the memory system, this describes a motherboard/memory controller with two 64-bit wide channels, providing doubled bandwidth over single-channel memory systems.

ECC - Error Checking and Correction: This feature can be accomplished through a variety of methods. The most popular method utilized by memory modules is single bit error correction, which is capable of detecting and correcting single-bit errors. It will also detect two-bit and some multiple bit errors, but is unable to correct them.

JEDEC - The JEDEC Solid State Technology Association (Once known as the Joint Electron Device Engineering Council), is the semiconductor engineering standardization body of the Electronic Industries Alliance (EIA), a trade association that represents all areas of the electronics industry. JEDEC is famous for its computer memory (RAM) standards, for example, DDR SDRAM and DDR2 SDRAM. JEDEC standardizes packages for electronic components as well.

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L~Z

Latency/ Timing – Latency is the time delay between a request to access memory and the actual output of the data, measured in clock cycles. There are several different types of latencies used to measure memory performance. These latency figures are often called memory timing. The most important memory latency is CAS Latency.

PCB - Printed Circuit Board: A fiberglass board with electrical traces to place and connect chips and other electronic components.

RAM - Random Access Memory: Used by a computer system as main memory to temporarily store data. Most contemporary RAM is volatile memory, i.e. the information will be lost when power is disrupted or shut off.

RAS - Row Address Strobe: A signal that indicates to DRAM a particular address as a row address, see CAS for more details.

RDRAM - Rambus Dynamic Random Access Memory: This is a type of synchronous DRAM, created by the Rambus Corporation. RDRAM features an architecture designed to achieve high bandwidth. It is used in the Sony PlayStation 2, early Pentium 4 desktop systems and other places. The XDR DRAM, RDRAM's successor, is used in IBM's Cell processor and the Sony PlayStation 3.

Registered/Unbuffered Memory - Almost all system memory in PCs today is unbuffered memory. With increasing system memory, stability and performance deterioration is inevitable since the memory controller has to address each memory chip on all modules directly. To solve this problem, higher density systems use registered memory instead, which contains registers as buffers to temporarily hold data for one clock cycle before it is transferred. This increases the reliability of high-speed data access to high density memory but sacrifices some performance. Registered memory modules are typically used only in servers and other mission-critical systems where it is extremely important that data is properly handled.

SDRAM - SDRAM has a synchronous interface. It waits for a clock pulse before transferring data and is therefore synchronous with the computer system bus and processor. This greatly improves performance over asynchronous DRAM. SDRAM is not as popular as it once was and may be used during upgrades. SDRAM modules usually come in the form of 168-pin DIMMs.

SO-DIMM - Small Outline Dual Inline Memory Module: A memory form factor that is significantly smaller than DIMM. It is often used in notebook computers and some other small form factor systems.

SPD - Serial Presence Detect: JEDEC standards require certain parameters to be stored in the EEPROM (electrically erasable programmable read-only memory) located on a memory module. This combination of parameters is called SPD information. Memory timing, manufacturer, speed, serial number and other useful information are contained in SPD information, and can be accessed via BIOS (basic input/output system).

SRAM - Static Random Access Memory: Unlike DRAM, there are only several transistors used in the memory cells of SRAM, with no capacitors involved. Thus SRAM do not require refreshing. This results in much higher performance, but SRAM is much more expensive than DRAM, and therefore is not utilized in the capacities that DRAM is. SRAM is used primarily for cache applications (e.g. CPU L1 Cache).

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